fixes to make macos work correctly. v0.1a ready for release

This commit is contained in:
2026-07-17 13:59:33 -05:00
parent 81f7bd84d0
commit 1e4e2a8ee4
3 changed files with 61 additions and 32 deletions
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+46 -27
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@@ -19,21 +19,34 @@
# define SYM(name) name # define SYM(name) name
#endif #endif
#define FN_BEGIN(name) FN_BEGIN_ASM SYM(name)
#define FN_END(name) FN_END_ASM SYM(name)
.macro FN_BEGIN_ASM name
.p2align 4
.globl \name
#if defined(__ELF__) #if defined(__ELF__)
# define FN_BEGIN(name) .p2align 4 ; .globl SYM(name) ; .type SYM(name), %function ; SYM(name): .type \name, %function
# define FN_END(name) .size SYM(name), . - SYM(name)
#else
# define FN_BEGIN(name) .p2align 4 ; .globl SYM(name) ; SYM(name):
# define FN_END(name)
#endif #endif
\name:
.endm
.macro FN_END_ASM name
#if defined(__ELF__)
.size \name, . - \name
#endif
.endm
/* Materialise a 64-bit constant without a literal pool, so no relocations and /* Materialise a 64-bit constant without a literal pool, so no relocations and
* no .ltorg placement worries across object formats. */ * no .ltorg placement worries across object formats. */
#define MOV64(reg, val) \ #define MOV64(reg, val) MOV64_ASM reg, val
movz reg, #((val) & 0xffff) ;\
movk reg, #(((val) >> 16) & 0xffff), lsl #16 ;\ .macro MOV64_ASM reg, val
movk reg, #(((val) >> 32) & 0xffff), lsl #32 ;\ movz \reg, #((\val) & 0xffff)
movk reg, #(((val) >> 48) & 0xffff), lsl #48 movk \reg, #(((\val) >> 16) & 0xffff), lsl #16
movk \reg, #(((\val) >> 32) & 0xffff), lsl #32
movk \reg, #(((\val) >> 48) & 0xffff), lsl #48
.endm
.text .text
@@ -527,25 +540,31 @@ FN_END(fm_compress)
* =================================================================== */ * =================================================================== */
/* rotate each 32-bit lane left by n, via shl + shift-right-and-insert */ /* rotate each 32-bit lane left by n, via shl + shift-right-and-insert */
#define VROTL(vd, vs, vt, n) \ #define VROTL(vd, vs, vt, n) VROTL_ASM vd, vs, vt, n
shl vt##.4s, vs##.4s, #(n) ;\
sri vt##.4s, vs##.4s, #(32 - (n)) ;\ .macro VROTL_ASM vd, vs, vt, n
mov vd##.16b, vt##.16b shl \vt\().4s, \vs\().4s, #(\n)
sri \vt\().4s, \vs\().4s, #(32 - (\n))
mov \vd\().16b, \vt\().16b
.endm
/* one ChaCha quarter-round over rows a,b,c,d using v24 as scratch */ /* one ChaCha quarter-round over rows a,b,c,d using v24 as scratch */
#define QROUND(a, b, c, d) \ #define QROUND(a, b, c, d) QROUND_ASM a, b, c, d
add a##.4s, a##.4s, b##.4s ;\
eor d##.16b, d##.16b, a##.16b ;\ .macro QROUND_ASM a, b, c, d
rev32 d##.8h, d##.8h ;\ add \a\().4s, \a\().4s, \b\().4s
add c##.4s, c##.4s, d##.4s ;\ eor \d\().16b, \d\().16b, \a\().16b
eor b##.16b, b##.16b, c##.16b ;\ rev32 \d\().8h, \d\().8h
VROTL(b, b, v24, 12) ;\ add \c\().4s, \c\().4s, \d\().4s
add a##.4s, a##.4s, b##.4s ;\ eor \b\().16b, \b\().16b, \c\().16b
eor d##.16b, d##.16b, a##.16b ;\ VROTL_ASM \b, \b, v24, 12
VROTL(d, d, v24, 8) ;\ add \a\().4s, \a\().4s, \b\().4s
add c##.4s, c##.4s, d##.4s ;\ eor \d\().16b, \d\().16b, \a\().16b
eor b##.16b, b##.16b, c##.16b ;\ VROTL_ASM \d, \d, v24, 8
VROTL(b, b, v24, 7) add \c\().4s, \c\().4s, \d\().4s
eor \b\().16b, \b\().16b, \c\().16b
VROTL_ASM \b, \b, v24, 7
.endm
FN_BEGIN(fm_chacha20) FN_BEGIN(fm_chacha20)
and x1, x1, #~63 /* whole 64-byte blocks only */ and x1, x1, #~63 /* whole 64-byte blocks only */
+15 -5
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@@ -30,13 +30,23 @@
# define SYM(name) name # define SYM(name) name
#endif #endif
#define FN_BEGIN(name) FN_BEGIN_ASM SYM(name)
#define FN_END(name) FN_END_ASM SYM(name)
.macro FN_BEGIN_ASM name
.p2align 4
.globl \name
#if defined(__ELF__) #if defined(__ELF__)
# define FN_BEGIN(name) .p2align 4 ; .globl SYM(name) ; .type SYM(name), @function ; SYM(name): .type \name, @function
# define FN_END(name) .size SYM(name), . - SYM(name)
#else
# define FN_BEGIN(name) .p2align 4 ; .globl SYM(name) ; SYM(name):
# define FN_END(name)
#endif #endif
\name:
.endm
.macro FN_END_ASM name
#if defined(__ELF__)
.size \name, . - \name
#endif
.endm
.text .text